Texas Instruments Computer Hardware TPS40051 User Manual

User’s Guide  
TPS40051-Based Design Converts  
12-V Bus to 1.8 V at 15 A (SLUP195)  
User’s Guide  
1
 
DYNAMIC WARNINGS AND RESTRICTIONS  
It is important to operate this EVM within the input voltage range of 0 V to 14 V  
.
DC  
DC  
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM.  
If there are questions concerning the input range, please contact a TI field representative prior to connecting  
the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or possible  
permanent damage to the EVM. Please consult the EVM Users Guide prior to connecting any load to the EVM  
output. If there is uncertainty as to the load specification, please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than 50°C. The EVM  
is designed to operate properly with certain components above 50°C as long as the input and output ranges are  
maintained. These components include but are not limited to linear regulators, switching transistors, pass  
transistors, and current sense resistors. These types of devices can be identified using the EVM schematic  
located in the EVM Users Guide. When placing measurement probes near these devices during operation,  
please be aware that these devices may be very warm to the touch.  
Mailing Address:  
Texas Instruments  
Post Office Box 655303  
Dallas, Texas 75265  
Copyright 2003, Texas Instruments Incorporated  
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SLUU161 April, 2003  
TPS40051-Based Design Converts 12-V Bus to  
1.8 V at 15 A (SLUP195)  
Mark Dennis  
System Power  
Contents  
1
2
3
4
5
6
7
8
9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Test Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Test Results and Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
EVM Assembly Drawing and PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
List of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
1
Introduction  
In many modern electronic applications there is a growing demand for circuits to convert a12-V bus to digital  
voltages as low as, but not limited to 1.8 V. The current requirements can range from below 1 A to over 15 A.  
For high-efficiency and small circuit size the TPS40051 wide-input synchronous buck controller can be used  
to provide the necessary control and drive functions to implement these converters. The TPS40051EVM001  
operates at 300 kHz and delivers 1.8 V at 15 A with efficiency over 90% for much of the load range, and a full  
load efficiency of 88%.  
The TPS40051 synchronous buck controller offers a variety of user programmable functions such as operating  
frequency, soft-start time, voltage feed-forward, high-side current limit, and external loop compensation. This  
controller also provides a regulated 10-V bias voltage which supplies onboard drivers for the N-channel switch  
and synchronous rectifier MOSFETs, utilizing adaptive gate drive logic to prevent cross conduction of the power  
[1]  
MOSFETs.  
2
Features  
The specification of this design is as follows:  
D
D
D
D
D
D
D
D
92% peak efficiency at 6 A  
88% peak efficiency at 15 A  
1.8V output at 15 A  
V
range from 10 V  
to 14 V  
DC DC  
IN  
Small circuit size 1.4x 2.5SMT design, components on single side  
Line/load regulation < 0.5%  
High-frequency 300-kHz operation  
Transient deviation 60 mV with 10-A load step  
4
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
SLUU161 April, 2003  
3
Schematic  
Figure 1. TPS40051EVM–001 (SLUP195) Schematic  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
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SLUU161 April, 2003  
4
Component Selection  
4.1 TPS40051 Device Selection  
The TPS4005x family of parts offers a range of output current configurations including source only (TPS40050),  
source/sink (TPS40051), or source/sink with V  
prebias (TPS40053). In this converter the TPS40051 with  
OUT  
source/sink capability is selected. This serves to maintain continuous inductor ripple current all the way to zero  
load to improve the small signal loop response by preventing the inductor current from transitioning to the  
discontinuous current mode.  
The TPS4005x family is packaged in TIs PWP PowerPAD thermally enhanced package which should be  
soldered to the PCB using standard solder flow techniques. The PowerPAD technology uses a thermally  
conductive epoxy to attach the integrated circuit die to the leadframe die pad, which is exposed on the bottom  
of the completed package. The PWP PowerPAD package has a θ = 2°C/W which helps keep the junction  
JC  
temperature rise relatively low even with the power dissipation inherent in the onboard MOSFET drivers. This  
power loss is proportional to switching frequency, drive voltage, and the gate charge needed to enhance the  
N-channel MOSFETs. Effective heat removal allows the use of ultra-small packaging while maintaining high  
component reliability.  
[2]  
The technical brief, PowerPAD Thermally Enhanced Package contains more information on the PowerPAD  
package.  
4.2 Frequency of Operation  
The clock oscillator frequency for the TPS40051 is programmed with a single resistor from RT (pin 2) to signal  
ground. The following equation (1) from the datasheet allows selection of RT in kfor a given switching  
frequency in kHz.  
1
(1)  
R + R2 +  
* 23 (kW)  
T
*6  
f
  17.82   10  
SW  
For 300-kHz operation, R2 is selected to be 165 kΩ.  
For a particular operating frequency, the PWM ramp time must be programmed via the resistor R  
connected  
KFF  
to V . Also, the selection of R  
programs the V voltage at which the circuit starts operation. This prevents  
IN  
KFF  
IN  
the circuit from starting at low voltages, which can lead to current flow larger than desired. R  
using equation (2).  
is programmed  
(2)  
KFF  
* 3.5   ǒ58.14   R ) 1340Ǔ (kW  
+ R6 + ǒV  
Ǔ
)
R
KFF  
IN(min)  
T
Where V  
is the minimum startup input voltage, and R is in k. Note that internal tolerances have been  
IN(min)  
T
incorporated into this equation, so the actual V  
frequency of 300-kHz, the R  
of the input voltage should be used. For an oscillator  
IN(min)  
value of 71.5 kis selected.  
KFF  
6
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
SLUU161 April, 2003  
4.3 UVLO Circuitry  
The user programmable UVLO built into the TPS4005x provides hysteresis for transients shorter than a total  
count of seven cycles. If the input voltage to the converter can be slowly rising around the minimum V range,  
IN  
external hysteresis can be incorporated to prevent multiple on/off cycles during startup or shutdown. These  
on/off cycles are a result of line impedance external to the EVM causing V to the module to drop when under  
IN  
load, which causes the programmable UVLO threshold to be crossed repetitively.  
In this converter, C1 and D1 are added to form a peak detector from the lower gate drive which is only active  
when the converter is operating. This provides a bias source to deliver hysteresis current from the peak detector  
voltage to the lower KFF voltage of 3.5 V, enabling the designer to alter the programmable UVLO shutdown  
point. The bias is not present during startup, so the circuit starts as expected from the R  
calculation.  
KFF  
In this application, R4 is selected to provide a hysteresis current of 20% I  
(3).  
. R4 can be calculated from equation  
KFF  
  ǒV * 3.5Ǔ  
R
KFF  
PD  
(3)  
R
+ R4 +  
HYS  
0.2   ǒV  
* 3.5Ǔ  
IN(min)  
where  
D
D
V
is the voltage on the peak detector  
PD  
V
is the desired start voltage used in the determination of R  
IN(min)  
KFF  
In a typical case, V  
= 8V, and R4 is found to be 247 k, and a standard value of 243kis selected. Testing  
PD  
shows the startup voltage to be 9.2 V, and the shutdown voltage to be 8.5 V.  
4.4 Inductance Value  
The output inductor L1 value used in the circuit of Figure 2 was selected from equation (4).  
V
V
OUT  
OUT  
(4)  
L +  
  1 *  
f   I  
V
RIPPLE  
IN(min)  
in which I  
is usually chosen to be in the range between 10% and 40% of I  
there is a ripple current of 3 A, and the inductance value is 1.7 µH.  
. With I = 20% of  
RIPPLE  
RIPPLE  
OUT  
I
OUT(max)  
4.5 Input capacitor selection  
Bulk input capacitor selection is based on allowable input voltage ripple and required RMS current carrying  
capability. In typical buck converter applications, the converter is fed from an upstream power converter with  
its own output capacitance. In this converter, ceramic capacitors capable of meeting circuit requirements are  
provided onboard. For this power level, input voltage ripple of approximately 250 mV is reasonable, and the  
minimum capacitance is calculated in (5).  
I   V  
I   D t  
D V  
O
15 A   1.8 V  
0.25 V   10 V   300 kHz  
(5)  
C
+
+
+
+ 36 mF  
IN  
D V   V   f  
IN  
S
Also consider the RMS current rating required for the input capacitors (6).  
V
OUT  
1.8  
10  
Ǹ
(6)  
Ǹ
i ^ I  
  D + I  
 
Ǹ
+ 15   
+ 6.4 A  
OUT  
OUT  
V
IN  
To meet this requirement with the smallest cost and size two 22 µF, 16 V, X5R ceramic capacitors (C12, C14)  
are installed on the board. In the 1812 case, the parts are able to carry approximately 4 A each. These  
RMS  
capacitors function as power bypass components and should be located close to the MOSFET packages to  
keep the high-frequency current flow in a small, tight loop.  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
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SLUU161 April, 2003  
4.6 Output Capacitor Selection  
Selection of the output capacitor is based on many application variables, including function, cost, size, and  
availability. The minimum allowable output capacitance is determined by the amount of inductor ripple current  
and the allowable output ripple, as given in equation (7).  
I
3 A  
RIPPLE  
(7)  
C
+
+
+ 83 mF  
OUT(min)  
8   f   V  
8   300 kHz   15 mV  
RIPPLE  
In this design, C  
is 83 µF with V  
=15 mV to allow for some margin. However, this only affects the  
OUT(min)  
RIPPLE  
capacitive component of the ripple voltage, and the final value of capacitance is generally influenced by ESR  
and transient considerations. The voltage component due to the capacitor ESR.  
V
15 mA  
3 A  
RIPPLE  
RIPPLE  
(8)  
C
v
+
+ 5 mW  
ESR  
I
An additional consideration in the selection of the output inductor and capacitance value can be derived from  
examining the transient voltage overshoot which can be initiated with a load step from full load to no load. By  
equating the inductive energy with the capacitive energy the equation (9) can be derived:  
ǒ Ǔ2 ǒ Ǔ2  
ǒ I  
Ǔ
L   
* I  
OL  
OH  
(
)
(9)  
2
1.7 mH   15 A  
L   I  
V
C v  
+
+ 1034 mF  
+ ǒ(  
) Ǔ  
O
2
ǒV Ǔ2  
* ǒV Ǔ2  
2
2
)
(
1.9 V * 1.8 V  
f
i
where  
I
I
= full load current  
= no load current  
OH  
OL  
V = allowed transient voltage rise  
f
V = initial voltage  
i
For compactness while maintaining transient response capability, two 470-µF POSCAP capacitors (C16, C17)  
are fitted in parallel. The total ESR of these capacitors is approximately 5 m. An additional 47-µF, 6.3-V ceramic  
capacitor C15 is placed in parallel with the POSCAPs to help suppress high frequency noise generated by the  
fast current transitions as the current switches between the input and output circuits during each switching cycle.  
4.7 MOSFET selection  
Proper MOSFET selection is essential to optimize circuit efficiency. To operate with high current it is important  
to choose a package which allows the generated heat to be removed from the package as easily as possible.  
Various MOSFETs with a package similar to the SO8 footprint are considered for this application, and devices  
with reduced junction-case thermal impedance are selected.  
For the upper switch Q1, a Hitachi HAT2168H MOSFET with low gate charge (typically 27 nC at 10 V) and with  
an R  
of 6 mis selected to keep the switching losses to a minimum. The low-side rectifier switch Q2 was  
DS(on)  
chosen as a Hitachi HAT2167H, which has slightly more gate charge (43 nC at 10 V) but lower R  
= 4.2  
DS(on)  
mto minimize conduction losses. A schottky diode, D2, is placed across Q2 in this high current design to carry  
some of the high circulating current during short circuit conditions.  
8
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
SLUU161 April, 2003  
4.8 Short Circuit Protection  
The TPS40051 implements short circuit protection by comparing the voltage across the topside MOSFET while  
it is ON to a voltage developed across R due to an internal current source of 10 µA inside pin 16. Both of these  
LIM  
voltages are negative with respect to V . From the datasheet equation, R  
is defined as:  
IN  
  R  
DS(on) (max)  
LIM  
I
V
OC  
OS  
(10)  
R
+ R9 +  
+
+ (W)  
LIM  
1.12   I  
I
SINK  
SINK  
where  
I
is the overcurrent set point equal to the DC output current plus one-half the inductor ripple current  
is the overcurrent comparator offset, and Isink is the current into ILIM (pin 16).  
OC  
V
OS  
Using worst case tolerances the value of R  
rated current under all conditions. In a worst case condition, R =R9 and  
should be maximized to ensure that the converter can deliver full  
LIM  
LIM  
(
)
(
)
15 A ) 1.5 A   7.9 mW   1.45  
* 30 mV  
8.65 mA  
(11)  
R
+
)
+ 16.0 kW  
LIM  
1.12   8.65 mA  
The standard value of 16.2 kwas selected. This ensures that we can deliver a minimum of 15 A before current  
limit is activated. There is also a small capacitor, C7, placed in parallel with R9 to filter the signal.  
4.9 Snubber Component Selection  
Initially, the junction of Q1, Q2, and L1 was ringing at a frequency near 100 MHz with a peak voltage near 30  
V. This was due to the extremely fast switching speed of the MOSFETs and the lack of any crossconduction.  
C13 was added to shunt the high-frequency ringing to ground and the peak voltage is now below 25 V.  
4.10 Compensation Components  
The TPS40051 uses voltage mode control with feed-forward in conjunction with a high-frequency error amplifier  
to implement closed loop control. The power circuit L-C double pole corner frequency f occurs at 3.8 kHz, and  
C
the output capacitor ESR zero is located at approximately 38 kHz. The feedback compensation network is  
implemented to provide two zeroes and three poles. The first pole is placed at the origin to improve DC  
regulation.  
The first zero is placed at 2.8 kHz, just below the L-C corner frequency.  
1
(12)  
(13)  
f
+
Z1  
2p   R5   C5  
The second zero is selected to be coincident with the L-C corner frequency of 3.8 kHz,  
1
f
+
Z2  
(
)
2p   R7 ) R8   C6  
The second pole is placed near the ESR zero frequency at 37 kHz.  
1
f
+
(14)  
(15)  
P1  
C4 C5  
C4)C5Ǔ  
ǒ
2p   R5   
and the third pole is placed at 150 kHz, which is one-half the switching frequency.  
1
f
+
P2  
2p   R8   C6  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
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SLUU161 April, 2003  
5
Test Setup  
Figure 2 illustrates the basic test setup needed to evaluate the TPS40051EVM001.  
5.1 DC Input Source  
The input voltage source should be capable of supplying between 10 V  
A of current. For best results the input leads should be made with a wire of 18AWG or larger.  
and 14 V  
and rated for at least 4  
DC  
DC  
5.2 Output Load  
The output load can be either an electronic load or a resistive load configured to draw between 0 A and 15 A.  
The output leads should be made with a wire of 16AWG or larger diameter wire. Monitor the output voltage on  
the PCB by connecting a voltmeter to TP9 and TP10 to prevent voltage drops through PCB traces and the output  
terminal block which can lead to substantial measurement errors.  
5.3 Oscilloscope Probe Test Jacks  
An oscilloscope probe test jack (TP8) has been included to allow monitoring the ourput voltage ripple.  
5.4  
Fan  
There is no cover to prevent the user from probing the internal circuit nodes. There are components that can  
get hot to the touch (above 60°C) in normal operation. A small fan delivering more than 15 cfm should be used  
when operating at and near full load.  
V
Test Points  
V
IN  
TP1 = V (+)  
IN  
10 V to 14 V  
IN  
TP2 = V ()  
IN  
+
Fan  
V
Test Points  
OUT  
TP9 = V  
(+)  
OUT  
()  
+  
TP10 = V  
OUT  
V
LOAD  
1.8 V / 15 A  
Figure 2. Test Setup  
10  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
SLUU161 April, 2003  
6
Test Results / Performance Data  
6.1 Efficiency and Power Loss  
Figure 3 shows the efficiency as the load is varied from 1 A to over 15 A. The typical efficiency remains over  
90% as the load ranges from 3 A to 12 A.  
POWER DISSIPATION  
EFFICIENCY  
vs  
LOAD  
vs  
LOAD  
7
94  
92  
90  
88  
86  
84  
82  
80  
78  
6
5
4
3
2
1
0
0
2
4
6
8
10  
12  
14  
16  
0
2
4
6
8
10  
12  
14  
16  
I
Output Current A  
OUT  
I
Output Current A  
OUT  
Figure 3  
Figure 4  
6.2 Closed Loop Performance  
OVERALL GAIN AND PHASE  
vs  
OSCILLATOR FREQUENCY  
160  
140  
120  
100  
80  
50  
40  
30  
20  
10  
0
Phase  
Gain  
60  
40  
10  
20  
20  
0
30  
100  
1 k  
10 k  
100 k  
f
Oscillator Frequency kHz  
OSC  
Figure 5.  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
11  
 
SLUU161 April, 2003  
6.3 Output Ripple and Transient Response  
Figure 6 shows the typical output voltage ripple with I  
=15 A to be less than 20 mVpp.  
OUT  
The transient response is shown in Figure 7 as the load is stepped from 5 A to 15 A. The voltage deviation is  
less than 60 mV.  
OUTPUT VOLTAGE RIPPLE  
TRANSIENT RESPONSE  
I
= 15 A  
OUT  
V
RIPPLE  
(10 mV/div)  
I
5 A/div  
OUT  
t Time 1 µs/div  
t Time 200 µs/div  
Figure 6  
Figure 7  
7
EVM Assembly Drawing and PCB Layout  
Figure 8. Top Side Component Assembly  
12  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
SLUU161 April, 2003  
Figure 9. Top Side Copper  
Figure 10. Internal Layer 1 Copper  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
13  
 
SLUU161 April, 2003  
Figure 11. Internal Layer 2 Copper  
Figure 12. Bottom Layer Copper  
14  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
SLUU161 April, 2003  
8
List of Materials  
Table 1 lists the parts values of the evaluation board. These values can be modified to meet the application  
requirements.  
Table 1. TPS40051EVM001 (SLUP195) List of Materials  
REFERENCE  
DESIGNATOR  
QTY  
DESCRIPTION  
SIZE  
MFR  
Vishay  
PART NUMBER  
C1, C4  
2
2
1
2
Capacitor, ceramic, 470 pF, 50 V, X7R, 10%  
Capacitor, ceramic, 22 µF, 16 V, X5R, 20%  
Capacitor, ceramic, 47 µF, 6.3 V, X5R, 20%  
Capacitor, POSCAP, 470 µF, 4 V, 10 m, 20%  
805  
1812  
VJ0805Y471KXAAT  
C4532X5R1C226MT  
C4532X5R0J476MT  
4TPD470M  
C12, C14  
C15  
TDK  
1812  
TDK  
(1)  
C16, C17  
7343 (D)  
Sanyo  
C2, C8, C10,  
C11, C18  
5
Capacitor, ceramic, 0.1 µF, 25 V, X7R, 10%  
805  
Vishay  
VJ0805Y104KXXAT  
C3  
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Capacitor, ceramic, 2.2 nF, 50 V, X7R, 10%  
Capacitor, ceramic, 5.6 nF, 50 V, X7R, 10%  
Capacitor, ceramic, 4.7 nF, 50 V, X7R, 10%  
Capacitor, ceramic, 100 pF, 50 V, NPO, 10%  
Capacitor, ceramic, 1 µF, 16V, X5R, 10%  
Diode, switching, 10 mA, 85 V, 350 mW  
Diode, schottky, 3 A, 40 V  
805  
805  
Vishay  
Vishay  
Vishay  
Vishay  
TDK  
VJ0805Y222KXAAT  
VJ0805Y562KXAAT  
VJ0805Y472KXAAT  
VJ0805A101KXAAT  
C2012X5R1C105KT  
C5  
C6,C13  
C7  
805  
805  
C9  
805  
D1  
SOT23  
SMC  
VishayLiteon BAS16  
D2  
IR  
30BQ040  
J1, J2  
Terminal block, 4-pin, 15 A, 5.1 mm  
0.80 x 0.35  
OST  
ED2227  
HC11R7  
HAT2168H  
HAT2167H  
Std  
(1)  
L1  
Inductor, SMT, 1.7µH, 22.3 A, 1.8 mΩ  
0.512 x 0.512 Coiltronics  
(1)  
Q1  
MOSFET, Nchannel, V  
30 V, R  
6 m, I 30 A  
LFPAK  
LFPAK  
805  
Hitachi  
Hitachi  
Std  
DS  
DS  
D
(1)  
Q2  
MOSFET, Nchannel, V  
30 V, R  
4.2 m, I 40 A  
DS  
DS  
D
R1  
Resistor, chip, 1 k, 1/10W, 1%  
Resistor, chip, 3.3 , 1/10W, 5%  
Resistor, chip, 0 , 1/10W, yy%  
Resistor, chip, 20 , 1/10W, 5%  
R10  
R11  
R12  
R2  
805  
Std  
Std  
805  
Std  
Std  
805  
Std  
Std  
Resistor, chip, 165 k, 1/10W, 1%  
Resistor, chip, 5.49 k, 1/10W, 1%  
Resistor, chip, 243 k, 1/10W, 1%  
Resistor, chip, 10 k, 1/10W, 1%  
Resistor, chip, 71.5 k, 1/10W, 1%  
Resistor, chip, 8.66 k, 1/10W, 1%  
Resistor, chip, 226 , 1/10W, 1%  
Resistor, chip, 16.2 k, 1/10W, 1%  
805  
Std  
Std  
R3  
805  
Std  
Std  
R4  
805  
Std  
Std  
R5  
805  
Std  
Std  
R6  
805  
Std  
Std  
R7  
805  
Std  
Std  
R8  
805  
Std  
Std  
R9  
805  
Std  
Std  
TP1, TP4,  
TP5, TP7, TP9  
5
4
1
JACK, test point, red  
Farnell  
240345  
TP2, TP3,  
TP6, TP10  
JACK, test point, black  
Adaptor, 3.5 mm probe clip  
Farnell  
240333  
131424400 or  
131503100  
TP8  
0.2  
Tektronix  
(1)  
U1  
1
1
Wide input synchronous buck controller  
PWP16  
TI  
TPS40051PWP  
SLUP195  
––  
PCB, 2.85x 2x .062 In  
Std  
(1)  
Should not be substituted.  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
15  
 
SLUU161 April, 2003  
9
References  
1. Data Sheet, TPS40051 Wide-Input Synchronous Buck Controller, Texas Instruments Literature Number  
SLUS540.  
2. Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature Number SLMA002  
16  
TPS40051-Based Design Converts 12-V Bus to 1.8 V at 15 A (SLUP195)  
 
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